Semiconductor chips or wafers are used in many applications, including as processor chips for computers, and as integrated circuits and as flash memory for hand held computing devices, wireless telephones, and digital cameras. Regardless of the application, it is desirable that a semiconductor chip hold as many circuits or memory cells as possible per unit area. In this way, the size, weight, and energy consumption of devices that use semiconductor chips advantageously is minimized, while nevertheless improving the memory capacity and computing power of the devices.
A common circuit component of semiconductor chips is the transistor. In ULSI semiconductor chips, a transistor is established by forming a polysilicon gate on a silicon substrate, and then forming a source region and a drain region in the substrate beneath the gate by implanting appropriate dopant materials into the areas of the substrate that are to become the source and drain regions. The gate is insulated from the substrate by a thin gate oxide layer, with small portions of the source and drain regions, referred to as "extensions", extending toward and virtually under the gate.
Between the source and drain regions and under the gate oxide layer is a channel region, a portion of which is doped. The doped portion of the channel region typically is doped early in the fabrication process, with the channel dopant usually being implanted during the steps of forming the gate and source and drain regions. This generally-described structure cooperates to function as a transistor.
To suppress deleterious "short channel" effects such as threshold voltage roll-off (i.e., transistor operation at below intended voltages), it is important that the dopant profile of the channel be steep. Stated differently, it is important that virtually all of the dopant in the channel region be concentrated within a relatively small area that is to function as the doped portion of the channel, with little or no dopant being located outside this relatively small doped region between the small doped region and the source and drain regions. With this in mind, it is desirable that the dopant profile of the channel region be a so-called "super-steep retrograded channel" (SSRC) profile.
As recognized by the present invention, semiconductor fabrication entails considerable heating during processing. Accordingly, structures such as doped channel regions that are established relatively early in the process are exposed to more heat than are structures formed relatively late in the process. As further recognized herein, however, exposing a channel region that has been doped relatively early in the manufacturing process to subsequent heating steps can cause the dopant in the channel to thermally diffuse and, hence, can cause the dopant profile of the channel undesirably to spread. Fortunately, the present invention addresses this problem.